ARCHITECTURE DES ORDINATEURS

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    In brief

  • ECTS credits : 5
  • Code : N7EN07

Objectives

VHDL will be presented through exemples of components. We will study its specific features (signals, parallel execution). Examples with increasing complexity will be considered, up to the design of the components of a computer (mini-processor, UART, memory hierarchy, ...). These components will be emulated on an FPGA. A project will consider a more complex example. In a second part, we will summarize the evolution towards multiprocessor architecture

Bibliography

• Architecture des Ordinateurs : une approche quantitative (J.L. Hennessy et D.A. Patterson - Thomson Publishing)
• VHDL - langage, modélisation, synthèse(R. AIRIAU et al. - Presses Polytechniques et Universitaires Romandes)

Organization

Contact(s)

SCHARBARG JEAN LUC

Contact

The National Institute of Electrical engineering, Electronics, Computer science,Fluid mechanics & Telecommunications and Networks

2, rue Charles Camichel - BP 7122
31071 Toulouse Cedex 7, France

+33 (0)5 34 32 20 00

Certifications

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