Component
École Nationale Supérieure d'Électrotechnique d'Électronique d'Informatique d'Hydraulique et des Télécommunications
Objectives
Master the real-time constraints associated with the digital control of a static converter (switching cell)
Discover and implement FPGA and SoftCore SoC processor components
Discover and implement computing architectures with tight time constraints (qq 10us)
Set up and test digital control laws with the processor and FPGA
Implement a DCPFC link using two switching cells with the techniques and tools provided
Description
Controlling a switching cell presents a number of difficulties, mainly due to the fact that these systems handle significant power (several kW) and that the cell's power switches operate at high frequencies (several tens of kHz). In a highly time-constrained environment, it is proposed to implement digital current control in a switching cell.
Pre-requisites
N5EE03-Logic System Design
N5EE02-Basic Elements of Algorithms, Programming, and Computer Architecture
N7EE01-Computer System Architecture and Development
N8EE14-Digital Control