Component
École Nationale Supérieure d'Électrotechnique d'Électronique d'Informatique d'Hydraulique et des Télécommunications
Objectives
Know how to select and size a power semiconductor component. Know how to interpret switching waveforms. Know how to develop a simple model capable of accounting for dynamic switching behavior. Be familiar with the main techniques for reducing switching stresses (suffered or emitted) and reducing losses at the power circuit, component, and driver circuit levels.
Description
In principle, this course follows the following outline:
- Presentation of the physical mechanisms involved and power semiconductor technologies: unipolar, bipolar, 2DEG HEMT, Si substrate, SiC, GaN, new materials, and advanced hybrid components. Current wide-bandgap and future ultra-wide-bandgap technologies.
- Review of the fundamentals of DC/DC cell switching. Introduction to vocabulary and definitions.
- Development of static and dynamic models using equivalent circuit elements of MOSFET and IGBT transistors. Case of RC-IGBT. Introduction to the PN junction diode and Schottky barrier diode models. In-depth study of nonlinear modeling of structural capacitances. Analysis of reverse conduction in the third quadrant of the MOSFET.
- Application of reverse conduction of the MOSFET in DC/DC “synchronous buck” and AC/DC “synchronous rectification.”
- Analysis of “hard” switching: modeling of di/dt, dv/dt, oscillations, and degrees of freedom on loss-EMI tradeoffs. Overcurrent, overvoltage, and oscillations: reduction techniques. Link to the 3A course – Reliability.
- Technology: reduction of parasitic switching loop inductance using busbar power circuits on “plates” or multilayer PCBs. Reduction of the grid loop. Introduction to power integration.
- Principles of “soft” switching (snubber) and switching aids.
- Example of a quasi-resonant converter.
- Introduction to “soft” switching: DC/DC converters on LC filters with large ripple. Properties, advantages, disadvantages, and areas of application.
- Link to DC/AC topologies: PWM “hard” switching and full-wave “soft” switching (introduction to course 3A CERE).
Two tutorials follow the last lecture, allowing students to practice analyzing switching waveforms on PLECS and using degrees of freedom on the gate driver to balance switching loss reduction and dynamic constraint control (di/dt, dv/dt).
Pre-requisites
Course 1A and specialization in power electronics.
