ARCHITECTURE DES ORDINATEURS

VHDL will be presented through exemples of components. We will study its specific features (signals, parallel execution). Examples with increasing complexity will be considered, up to the design of the components of a computer (mini-processor, UART, memory hierarchy, ...). These components will be emulated on an FPGA. A project will consider a more complex example. In a second part, we will summarize the evolution towards multiprocessor architecture